Stanley Meyer tec devices test and debugging suite

[bussi04]

[bussi04]

[bussi04]

[Tecstatic]

I'm just doing a fast check in during diner ( a little delayed)

Super

Then revert back

MOD 1446#1 Break connection between R12-R13 and U4 pin 9 - done
MOD 1446#2 Connect RV7 pin 1 to U4 pin 9 - done

Then we should succeed, hopefully

[bussi04]

[Tecstatic]

Diner is served, so I'm off for 20-30 minutes.

[Tecstatic]

Yes exactly.

Now I will read the almost unreadable printed application note ICAN-6101 with my magnifier glasses.

Meanwhile

MOD 1459#1 move R12 wire from U4 pin 2 to U4 pin 13.

Please repeat the test sequence as in post 1454, like you did first time.

If that does not work, replace U4 with a new IC. (save the old with a mark attached)

Meanwhile I will study the app note.

[bussi04]

[bussi04]

[bussi04]

[bussi04]

[Tecstatic]

Forget about the LEDs, it was not legal, and it did not work. we must use the scope insted.

When the frequency is below the resonance, the C10 voltage must be high, but it is low.

This is positive feedback, so it will just saturate instead of regulate.

So we must have the circuit arranged so that when the frequency is below resonance, the C10 voltage is > 2.5V.

If it does not work to swap P3-P4, then the wires U4 pin 3-14 must be swapped.

COND 1454#1 The PLL must reduce the C10 voltage when we increase the frequency above resonance.

MOD 1454#1 Swap P3-P4

if COND 1454#1 is false then

MOD 1454#2 Swap U4 pin 3-14

if COND 1454#1 is false then

MOD 1454#3 Swap P3-P4

At some point in this sequence, COND 1454#1 should become true.

[bussi04]

[bussi04]

[Tecstatic]

Bussi,

Regarding the LEDs something is not right.

At 4868 hz (GND at U4 pin 9) 0.9V with 0.1V ripple GND-led bright, VCC-led medium bright

Let me describe it this way.

Between VCC and GND you have 4 components in series.

A LED one pin to VCC, a LED one pin to GND. The two free LED pins are connected via two 10K resistors in series.

If we connect the resistors midpoint to GND the "VCC LED" is on, If we connect the midpoint to VCC, the "GND LED is on". right ?

So when you report U4 pin2 voltage measured averaged at C10 being 0.9V + 0.1Vripple = 1V that is less than the forward voltage for the "GND LED" which is > 1.8V. So the "GND LED" must be off.

To avoid confusion let us name the LED at GND as the "1 LED" as it indicates the voltage leaning towards logic "1". The other LED at VCC rail is then the"0 LED".

If both LEDs are equally bright, then it indicates a C10 voltage near 2.5V. This will be the case when center frequency = resonance frequency and it is in locked state.

Addition as answer:

The LEDs are both bright because of the U4 pin 2 switching, so lets try something new, this is normally not valid to do. So we monitor the C10 voltage without loading, and hope that U15 will accept the violation of logic levels and logic shift transition times.

MOD 1451#1 connect U15 pin 5 to midpoint R12-R13 (no longer to GND)
MOD 1451#2 connect U15 pin 4 to midpoint of LED resistors

--------------

When the frequency is below the resonance, the C10 voltage must be high, but it is low.

This is positive feedback, so it will just saturate instead of regulate.

So we must have the circuit arranged so that when the frequency is below resonance, the C10 voltage is > 2.5V.

If it does not work to swap P3-P4, then the wires U4 pin 3-14 must be swapped.

Let me hear your findings.